※ Background
※ Problem Statement
※ General Solution
※ Contribution
v- Experimental Results and Analysis
ØØ Latency vs. Injection RateØ Latency vs. Number of Virtual Channels※ Conclusion
※ Network-on-Chip (NoC) is an approach to designing the communication subsystem between IP cores on a single chip, modules are interconnected via switches (routers)
※ Size: mm-scale
※ Numbers of processors: dozens of or even hundreds of
※ Communication method:“Point-to-point” and “packet-based (usually in flit)”
※ Layered protocol (MAC layer, network layer)
※ Modules’ structures should be as simple as possible
v※ Variety kinds of topologies are used in NoC